Principal/SR Design Rule Engineer

Company: Micron Technology
Location: Boise
Posted on: February 25, 2021

Job Description:

Micron's vision is to transform how the world uses information to enrich life for all.----- Join an inclusive team focused on one thing: using our expertise in the relentless pursuit of innovation for customers and partners. The solutions we create help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing.-- Req. ID: 267642-- Micron Technology's vision is to transform how the world uses the information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. As Principal/SR Design Rule Engineers, our primary responsibility is to be a catalyst to next-generation DRAM development efforts! We exercise deep knowledge on defining, executing, and coordinating effective actions to enable the project to hit key achievements and time-lines. We are pathfinding and groundbreaking DRAM and emerging memory technologies to enrich life. Come innovate with us! Responsibilities include but are not limited to the following:

• Coordinate the work of incredible engineers from multiple groups to help advise development efforts for a new DRAM generation from early development until manufacturing ceases
• Pro-actively identify and address process issues and process window vs. die size issues stemming from specific database layout or layout techniques
• Assure that the right DRC's (Design Rule Checks) are in place, assure appropriate reaction to deviation from established design rules
• Strategically partner with multiple teams and fields to understand process issues related to the database layout, and prioritize development of solutions with Process Integration, Advanced Mask Design, Scribe & Frame, Layout & Design
• Help craft and evaluate test structures to provide data for next generation devices, to quantify process margin on current devices
• Summarize sophisticated problems, derive and explain actions taken to address them
• Drive effective multi-functional communication on issue resolution, and support across node Design Rule alignment
• Define sub-milestones for the project within the layout schedule and work with the various teams to achieve the targets and time-lines
• Maintain and implement meaningful communication between Process Integration, Product Engineering, Advanced Mask teams
• Improve timely documentation of the R&D activities with regard to design rule improvements for transfer to parts still in design Minimum Qualifications:
  • MS/PhD in Electrical Engineering, Microelectronics, Physics or related field
  • Senior level (5+ years) experience in the semiconductor industry in the areas of Process Integration, Yield Enhancement, Product Engineering, Test Structure Development, or Unit Process Development
  • Solid grasp and exposure to craft & layout with the ability to do minor layout, work with Pcells is desired
  • Success in resolving sophisticated issues
  • Think and communicate clearly in urgent and stressful situations
  • Possess a deep understanding of the DRAM process flow, as well as the function and purpose of major DRAM components, such as Sense Amp, Word-line driver, and Anti-Fuse
  • Exposure and are familiar with CAD group interactions, data post-processing, and the process of transferring data from the database to the reticle
  • Previous experience in R&D for DRAM (or other memory technologies) or working with-in Product Engineering Employee Rewards Program, Healthcare, Paid time off (combined sick-leave and vacation time), Retirement Savings Plan, Paid Maternity/Paternity Leave, Employee Assistance Program, Professional Development Training, Workplace Wellness Program, Micron Health Clinic (Boise only), Fitness Center/Activity Rooms (Boise only), Tuition Reimbursement, Micron Corporate Discounts, Casual Dress Attire. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions. Through our global brands - Micron-- and Crucial-- - our broad portfolio of high-performance memory and storage technologies, including DRAM, NAND, 3D XPoint--- memory and NOR, is transforming how the world uses information to enrich life. Backed by more than 40 years of technology leadership, our memory and storage solutions enable disruptive trends, including artificial intelligence, 5G, machine learning and autonomous vehicles, in key market segments like mobile, data center, client, consumer, industrial, graphics, automotive, and networking. Our common stock is traded on the Nasdaq under the MU symbol. To learn more visit--micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. Micron prohibits the use of child labor and complies with all applicable laws, rules, regulations and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's Human Resources Department at 1-800-336-8918 or 208-368-4748 and/or by completing our General Contact Form
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Keywords: Micron Technology, Boise , Principal/SR Design Rule Engineer, Engineering , Boise, Idaho