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Intern - Physical Design and Static Timing Analysis Engineer

Company: Marvell Semiconductor, Inc.
Location: Boise
Posted on: November 25, 2022

Job Description:

About MarvellAt Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, store, process and secure the world's data with semiconductor solutions designed for our customers' current needs and future ambitions. Through a process of deep collaboration and transparency, we're ultimately changing the way tomorrow's enterprise, cloud, automotive, and carrier architectures transform-for the better.
The data infrastructure that our customers build has never been more critical to our global economy. It's what's keeping the world connected, businesses running, and information flowing. If you're ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.The OpportunityThe Central Engineering Processor and ASIC Design Services Team within Marvell provides chip solutions for next generation 5G carriers, cloud data centers, enterprise, and automotive applications. As a member of the team, you will have the opportunity to develop and grow your design skills, supporting architecture to RTL and netlist to GDSII implementation of ASIC and processor designs. Come join a world-class team and help bring the next generation of exciting products to market!Job Responsibilities:

  • Understand design specifications
    • Implement designs through all aspects of implementation (floor planning, placement, clock insertion, routing, timing closure, and physical verification) using industry standard EDA tools.
    • Work with design teams across various disciplines to ensure designs converge and integrate in a timely manner.
    • Write scripts in Python, TCL, Perl, and Shell to aid design and development activities
    • Utilize problem solving skills to analyze, debug, and implement fixes for design violations using defined CAD tools/flow
    • Collaborate with global CAD teams on design flow fixes and feature improvements
      • Utilize technical leadership abilities and sound communication skills to drive and manage physical design deliverables for cross-site teamsRequirements:Minimum Qualifications
        • Candidate MUST be currently pursuing a BS/MS (preferred) degree in EE/CS or related technical field(s)
        • 0-1 years of previous experience
        • Great problem solving and critical thinking skills
        • Detail oriented and self-motivated team worker with good verbal and written communication skillsPreferred Qualifications
          • Experience working in a Unix type environment
          • Scripting skills in Python/TCL/Perl/...
          • Knowledge of SOC Design and STA flows is a plus
            The PerksWith competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We'll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it's like to work at Marvell, visit our Careers page.Your FutureMarvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.At Marvell, we are doing our part to help keep our communities and our teams safe. As part of our efforts to address the Covid pandemic and future epidemics, you may be required at any time by our policies or applicable laws to provide proof of applicable vaccination or to present negative test results.This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at GR-HR-Services-Americas@marvell.com or 408-222-3604.

Keywords: Marvell Semiconductor, Inc., Boise , Intern - Physical Design and Static Timing Analysis Engineer, Other , Boise, Idaho

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